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Timing-Constrained Global Routing with RC-Aware Steiner Trees and Routing Based Optimization 

Scheifele, Rudolf (2019-06-14)
In this thesis we consider the global routing problem, which arises as one of the major subproblems in the physical design step in VLSI design. In global routing, we are given a three-dimensional grid graph G with edge ...

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Author
Scheifele, Rudolf (1)
SubjectGlobal Routing (1)incremental routing (1)Inkrementelles Routing (1)path search (1)Pfadsuche (1)RC delay (1)Resource-Sharing (1)Signallaufzeiten (1)Steiner trees (1)Steiner-Bäume (1)... View MoreClassification (DDC)
510 Mathematik (1)
... View MoreResource TypeDissertation oder Habilitation (1)... View MoreDate Issued2019 (1)

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