Mathematisch-Naturwissenschaftliche Fakultät: Suche
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Timing-Constrained Global Routing with RC-Aware Steiner Trees and Routing Based Optimization
(2019-06-14)
In this thesis we consider the global routing problem, which arises as one of the major subproblems in the physical design step in VLSI design. In global routing, we are given a three-dimensional grid graph G with edge ...
Dynamic Local Usage in BonnRouteGlobal
(2023-12-14)
In this dissertation we consider the global routing problem which is a central task in chip design. Up to millions of sets of pins on a chip, so called nets, have to be connected through wires without intersecting each ...
Global Timing Optimization in Chip Design
(2021-04-12)
In this thesis, we aim at solving the interconnect optimization problem comprehensively. By balancing global timing, routing, placement, and power constraints in a global model, we obtain solutions which outperform the ...





